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@crawfxrd crawfxrd commented Jan 8, 2026

According to the datasheet, the e-flash signature can be at any 16-byte aligned address in 0x40-0xF0. Because of an address conflict with SDCC 4.5.0, move the signature to 0x80. This matches the address for Zephyr RISC-V SoCs, like 82302.

Ref: zephyrproject-rtos/zephyr#36379
Resolves: #518

@crawfxrd crawfxrd marked this pull request as ready for review January 20, 2026 17:27
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@crawfxrd will this work on all currently supported ITE ECs?

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Presumably. I tested it works on IT5570 (darp10-b). I don't have a IT8587 board, but it should work on those older boards as well.

I'm doing some testing now and adding more documentation for the "known" bits.

jackpot51
jackpot51 previously approved these changes Jan 20, 2026
According to the datasheet, the e-flash signature can be at any 16-byte
aligned address in 0x40-0xF0. Because of an address conflict with SDCC
4.5.0, move the signature to 0x80. This matches the address for Zephyr
RISC-V SoCs, like 82302.

Ref: zephyrproject-rtos/zephyr#36379
Signed-off-by: Tim Crawford <tcrawford@system76.com>
@crawfxrd
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Must be checked on an IT8587 board. 32k clock selection changed from external crystal to internal clock generator.

There's no clock source connected to GPJ6/7 on any board and they're all configured as GPIO and not ALT function, so I don't think it would even work. I guess there's no issue because nothing is actually using the 32 kHz clock? (Proprietary firmware also has it set to use external crystal.)

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SDCC 4.5.0 conflicts with ITE code signature, puts HOME segment at wrong address

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