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Actually enable the AIX Extended Altivec ABI in LLVM#153784

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Gelbpunkt wants to merge 1 commit intorust-lang:mainfrom
Gelbpunkt:aix-extabi-llvm
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Actually enable the AIX Extended Altivec ABI in LLVM#153784
Gelbpunkt wants to merge 1 commit intorust-lang:mainfrom
Gelbpunkt:aix-extabi-llvm

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@Gelbpunkt
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As far as I can tell, the intent for the powerpc64-ibm-aix target was to enable the AIX Extended Altivec ABI, since abi in the target spec was set to vec-extabi. This field however has no effect on LLVM codegen and the AIX vector ABI is not set via llvm_abiname, but rather enabled in the global TargetOptions struct.

Since we only have one AIX target and I believe it should be using the newer ABI, we can unconditionally enable the target option if the target triple is an AIX triple.

r? @RalfJung perhaps? I don't think anyone in the team has AIX expertise

Also cc @nikic, I think this is a bit ugly on the LLVM side, is there perhaps a better way?

As far as I can tell, the intent for the powerpc64-ibm-aix target was to
enable the AIX Extended Altivec ABI, since `abi` in the target spec was
set to `vec-extabi`. This field however has no effect on LLVM codegen
and the AIX vector ABI is not set via `llvm_abiname`, but rather enabled
in the global TargetOptions struct.

Since we only have one AIX target and I believe it should be using the
newer ABI, we can unconditionally enable the target option if the target
triple is an AIX triple.
@rustbot rustbot added A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. labels Mar 12, 2026
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rustbot commented Mar 12, 2026

RalfJung is not on the review rotation at the moment.
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@Gelbpunkt
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also cc @daltenty, @gilamn5tr and @amy-kwan as the target maintainers for AIX

@nikic
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nikic commented Mar 12, 2026

Wait, wat? Why is this a TargetMachine option and not controlled via target-abi? Won't this break with LTO?

@Gelbpunkt
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Wait, wat? Why is this a TargetMachine option and not controlled via target-abi? Won't this break with LTO?

I think this will break with LTO, yes. I'm not sure why it is implemented this way in LLVM, it was introduced in llvm/llvm-project@c92f29b

// We only support the AIX Extended Altivec ABI and not the legacy AIX ABI.
// This is required for using the non-volatile vector registers.
if (Trip.isOSAIX())
Options.EnableAIXExtendedAltivecABI = true;
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Can you add a comment here explaining that abi: Abi::VecExtAbi is correct because we hard-code that for all AIX targets in LLVMRustCreateTargetMachine?

@RalfJung
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Wait, wat? Why is this a TargetMachine option and not controlled via target-abi? Won't this break with LTO?

I was wondering the same thing and I am happy that I am not the only one who finds this to be a poor interface choice.^^
(By target-abi, do you mean ABIName?)


This seems quite hacky but then it seems we already have some Trip checks in that function and the API LLVM provides is hacky indeed.

That said
r? @nikic
since I really don't know what is happening here.^^

@rustbot rustbot assigned nikic and unassigned RalfJung Mar 12, 2026
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rust-bors bot commented Mar 13, 2026

☔ The latest upstream changes (presumably #153684) made this pull request unmergeable. Please resolve the merge conflicts.

@daltenty
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Thanks for looking into this. I'm not sure though that the consequences of enabling the extended vector ABI we're completely consider though when vec-extabi was specified for the target.

Mainly there are some know safety concerns linking against legacy modules which may fail to respect the ABI (as documented here):
https://www.ibm.com/docs/en/aix/7.2.0?topic=processor-legacy-abi-compatibility-interoperability

I think we'll want to take a closer look at what we are depending on to make sure there's no exposure to such issue before enabling this.

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A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.

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