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WORKAROUND: arm64: dts: qcom: Add power supply for PCIe3a #786

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WORKAROUND: arm64: dts: qcom: Add power supply for PCIe3a #786

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124 changes: 122 additions & 2 deletions arch/arm64/boot/dts/qcom/glymur-crd.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -248,6 +248,48 @@
pinctrl-names = "default";
};

vreg_pcie_12v: regulator-pcie-12v {
compatible = "regulator-fixed";

regulator-name = "VREG_PCIE_12V";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;

gpio = <&tlmm 26 GPIO_ACTIVE_HIGH>;
enable-active-high;

pinctrl-names = "default";
pinctrl-0 = <&pcie_x8_12v>;
};

vreg_pcie_3v3_aux: regulator-pcie-3v3-aux {
compatible = "regulator-fixed";

regulator-name = "VREG_PCIE_3P3_AUX";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;

gpio = <&tlmm 136 GPIO_ACTIVE_HIGH>;
enable-active-high;

pinctrl-names = "default";
pinctrl-0 = <&pm_aux_3p3_en>;
};

vreg_pcie_3v3: regulator-pcie-3v3 {
compatible = "regulator-fixed";

regulator-name = "VREG_PCIE_3P3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;

gpio = <&tlmm 135 GPIO_ACTIVE_HIGH>;
enable-active-high;

pinctrl-names = "default";
pinctrl-0 = <&pm_main_3p3_en>;
};

sound {
compatible = "qcom,glymur-sndcard";
model = "GLYMUR-CRD";
Expand Down Expand Up @@ -688,13 +730,42 @@
qcom,dmic-sample-rate = <4800000>;
};

&pcie3a {
pinctrl-0 = <&pcie3a_default>;
pinctrl-names = "default";

status = "okay";
};

&pcie3a_phy {
vdda-phy-supply = <&vreg_l3c_e1_0p89>;
vdda-pll-supply = <&vreg_l2c_e1_1p14>;
vdda-qref-supply = <&vreg_l1f_e1_0p82>;
vdda-qref2-supply = <&vreg_l2f_e1_0p83>;
vdda-refgen0p9-supply = <&vreg_l1c_e1_0p82>;
vdda-refgen1p2-supply = <&vreg_l4f_e1_1p08>;

status = "okay";
};

&pcie3a_port0 {
compatible = "pciclass,0604";

vpcie3v3aux-supply = <&vreg_pcie_3v3_aux>;
vpcie12v-supply = <&vreg_pcie_12v>;
vpcie3v3-supply = <&vreg_pcie_3v3>;

reset-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
};

&pcie3b {
vddpe-3v3-supply = <&vreg_nvmesec>;

pinctrl-0 = <&pcie3b_default>;
pinctrl-names = "default";

status = "okay";
status = "disabled";
};

&pcie3b_phy {
Expand All @@ -705,7 +776,7 @@
vdda-refgen0p9-supply = <&vreg_l1c_e1_0p82>;
vdda-refgen1p2-supply = <&vreg_l4f_e1_1p08>;

status = "okay";
status = "disabled";
};

&pcie3b_port0 {
Expand Down Expand Up @@ -925,6 +996,55 @@
<10 2>, /* OOB UART */
<44 4>; /* Security SPI (TPM) */

pcie3a_default: pcie3a-default-state {
clkreq-n-pins {
pins = "gpio144";
function = "pcie3a_clk";
drive-strength = <2>;
bias-pull-up;
};

perst-n-pins {
pins = "gpio143";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
wake-n-pins {
pins = "gpio145";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};

pcie_x8_12v: pcie-12v-default-state {
pins = "gpio26";
function = "gpio";
output-enable;
output-high;
drive-strength = <16>;
bias-disable;
};

pm_aux_3p3_en: pcie-aux-3p3-default-state {
pins = "gpio136";
function = "gpio";
output-enable;
output-high;
drive-strength = <16>;
bias-disable;
};

pm_main_3p3_en: pcie-main-3p3-default-state {
pins = "gpio135";
function = "gpio";
output-enable;
output-high;
drive-strength = <16>;
bias-disable;
};

edp_bl_en: edp-bl-en-state {
pins = "gpio18";
function = "gpio";
Expand Down