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[CK_TILE][FMHA] Add new tile size for async #3586
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Signed-off-by: Linjun-AMD <Jun.Lin@amd.com>
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Performance` improve 30% on gfx950 when block_num <= cu_num `./bin/tile_example_fmha_fwd -h=8 -d=128 -s=512 -kname=1 -v=1 ./bin/tile_example_fmha_fwd -h=8 -d=128 -s=512 -kname=1 -v=1 |
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Pull request overview
This PR adds a new tile size configuration for async pipeline operations in the FMHA (Fused Multi-Head Attention) forward pass implementation. The changes introduce support for a 64x128 tile configuration for specific head dimension scenarios and adjust the sequence tuning logic to accommodate this new tile size.
Changes:
- Modified sequence tuning logic to include tile size 64 as a special case alongside the maximum tile size
- Added filtering logic to exclude 64-size tiles for non-async pipelines with 128x128 head dimensions
- Introduced a new 64x128x32 tile size configuration with compute unit constraint for 128x128 head dimensions
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Signed-off-by: Linjun-AMD <Jun.Lin@amd.com>
This reverts commit f3aafb9.
Proposed changes
This PR adds a new tile size configuration for async pipeline operations in the FMHA (Fused Multi-Head Attention) forward pass implementation. The changes introduce support for a 64x128 tile configuration for specific head dimension scenarios and adjust the sequence tuning logic to accommodate this new tile size.
Changes:
Modified sequence tuning logic to include tile size 64 as a special case alongside the maximum tile size
Added filtering logic to exclude 64-size tiles for non-async pipelines with 128x128 head dimensions
Introduced a new 64x128x32 tile size configuration with compute unit constraint for 128x128 head dimensions
Checklist
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