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MM871/README.md

Hi, I'm Mihir 👋

Computer Engineering student @ University of Toronto (PEY Co-op)

RISC-V Design @ UofT Open Source Society (Jan 2025 – Present)

  • Designing and verifying register/control modules in Verilog for a multi-cycle RISC-V processor

Development Team Lead @ Tech Under 20 (Aug 2021 – Jul 2024)

  • Led a 9-person dev team, built a custom online judging platform, increased event engagement by 50%

Languages
C C++ TypeScript JavaScript Verilog Assembly

Web & Backend
Next.js Node.js Express PostgreSQL WebSockets

Hardware & Embedded
Arduino FPGA RISC-V

Tools
Git Quartus ModelSim VS Code

Projects

Project Description Stack
PaiMap High-performance mapping app w/ O(1) spatial queries C++
LiveMeet Real-time AI meeting analyzer Next.js, Express.js, Groq LLM, Typescript, Tailwind
PulsePatrol FPGA radar system with VGA display C, C++, Assembly
Logic-Gate-Grand-Prix Two-player FPGA racing game Verilog
Line-Following-Robot 1st place UofT Robotics Competition C, Arduino

Connect

LinkedIn Email

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  1. PaiMap PaiMap Public

    C++ 1

  2. LiveMeet LiveMeet Public

    Full-stack real-time meeting analyzer with LLM integration, WebSockets, and REST API

    TypeScript 1

  3. PulsePatrol PulsePatrol Public

    FPGA + Arduino radar system with VGA display, joystick control, and GPIO bit-bang communication

    C 1

  4. Logic-Gate-Grand-Prix Logic-Gate-Grand-Prix Public

    A Verilog based 2 player top down racing game, using a variety of peripherals

    Verilog

  5. Line-Following-Robot Line-Following-Robot Public

    Autonomous line-following robot in C on Arduino — 1st place UofT Robotics Competition with a record 12-second track time

    C 1

  6. UTOSS/risc-v UTOSS/risc-v Public

    UTOSS' starter multicycle RISC-V core.

    SystemVerilog 9 11