Skip to content

Add alpha support for 9.7 data processing intrinsics#428

Open
rockdreamer wants to merge 9 commits intoARM-software:mainfrom
rockdreamer:dp97
Open

Add alpha support for 9.7 data processing intrinsics#428
rockdreamer wants to merge 9 commits intoARM-software:mainfrom
rockdreamer:dp97

Conversation

@rockdreamer
Copy link
Contributor


name: Add alpha support for 9.7 data processing intrinsics
about: feature proposal.


This change adds intrinsics for the following architectural features:

  • FEAT_F16F32DOT
  • FEAT_F16F32MM
  • FEAT_F16MM
  • FEAT_SVE_B16MM
  • FEAT_SVE2p3
  • FEAT_SME2p3

Checklist: (mark with X those which apply)

  • If an issue reporting the bug exists, I have mentioned it in the
    PR (do not bother creating the issue if all you want to do is
    fixing the bug yourself).
  • I have added/updated the SPDX-FileCopyrightText lines on top
    of any file I have edited. Format is SPDX-FileCopyrightText: Copyright {year} {entity or name} <{contact informations}>
    (Please update existing copyright lines if applicable. You can
    specify year ranges with hyphen , as in 2017-2019, and use
    commas to separate gaps, as in 2018-2020, 2022).
  • I have updated the Copyright section of the sources of the
    specification I have edited (this will show up in the text
    rendered in the PDF and other output format supported). The
    format is the same described in the previous item.
  • I have run the CI scripts (if applicable, as they might be
    tricky to set up on non-*nix machines). The sequence can be
    found in the contribution
    guidelines
    . Don't
    worry if you cannot run these scripts on your machine, your
    patch will be automatically checked in the Actions of the pull
    request.
  • I have added an item that describes the changes I have
    introduced in this PR in the section Changes for next
    release
    of the section Change Control/Document history
    of the document. Create Changes for next release if it does
    not exist. Notice that changes that are not modifying the
    content and rendering of the specifications (both HTML and PDF)
    do not need to be listed.
  • When modifying content and/or its rendering, I have checked the
    correctness of the result in the PDF output (please refer to the
    instructions on how to build the PDFs
    locally
    ).
  • The variable draftversion is set to true in the YAML header
    of the sources of the specifications I have modified.
  • Please DO NOT add my GitHub profile to the list of contributors
    in the README page of the project.

amilendra added a commit to amilendra/llvm-project that referenced this pull request Mar 12, 2026
…tions

Add the following new clang intrinsics based on the ACLE specification
ARM-software/acle#428 (Add alpha support for 9.7 data processing intrinsics)

Multi-vector saturating rounding shift right narrow and interleave instructions
- SQRSHRN
  - svint8_t svqrshrn_s8(svint16x2_t, uint64_t) / svint8_t svqrshrn_n_s8_s16_x2(svint16x2_t, uint64_t)

- UQRSHRN
  - svuint8_t svqrshrn_u8(svuint16x2_t, uint64_t) / svuint8_t svqrshrn_n_u8_u16_x2(svuint16x2_t, uint64_t)

- SQRSHRUN
  - svuint8_t svqrshrun_u8(svint16x2_t, uint64_t) / svuint8_t svqrshrun_n_u8_s16_x2(svint16x2_t, uint64_t)

Multi-vector saturating shift right narrow and interleave
- SQSHRN
  - svint8_t svqshrn_s8(svint16x2_t, uint64_t) / svint8_t svqshrn_n_s8_s16_x2(svint16x2_t, uint64_t)
  - svint16_t svqshrn_s16(svint32x2_t, uint64_t) / svint16_t svqshrn_n_s16_s32_x2(svint32x2_t, uint64_t)

- UQSHRN
  - svuint8_t svqshrn_u8(svuint16x2_t, uint64_t) / svuint8_t svqshrn_n_u8_u16_x2(svuint16x2_t, uint64_t)
  - svuint16_t svqshrn_u16(svuint32x2_t, uint64_t) / svuint16_t svqshrn_n_u16_u32_x2(svuint32x2_t, uint64_t)

- SQSHRUN
  - svuint8_t svqshrun_u8(svint16x2_t, uint64_t) / svuint8_t svqshrun_n_u8_s16_x2(svint16x2_t, uint64_t)
  - svuint16_t svqshrun_u16(svint32x2_t, uint64_t) / svuint16_t svqshrun_n_u16_s32_x2(svint32x2_t, uint64_t)
MartinWehking added a commit to MartinWehking/llvm-project that referenced this pull request Mar 16, 2026
Add Clang/LLVM intrinsics for svcvt, scvtflt, ucvtf, ucvtflt and fcvtzsn,
fcvtzun.
The Clang intrinsics are guarded by the sve2.3 and sme2.3 feature flags.

ACLE Patch:
ARM-software/acle#428
This change adds
- AdvSIMD dot intrinsics available under FEAT_F16F32DOT
- SVE dot intrinsics available under either FEAT_SVE2p3 || FEAT_SME2p3
This change adds
- AdvSIMD intrinsics based on FMMLA available under FEAT_F16F32MM and FEAT_F16MM
- SVE intrinsics available under either FEAT_F16MM and FEAT_SVE_B16MM
This change adds support for the svluti6 operations under FEAT_SVE2p3 and FEAT_SME2p3.
This change adds support for the svaddqp, svaddsubp and svsubp operations under FEAT_SVE2p3 and FEAT_SME2p3.
This change adds support for the svcvt* operations under FEAT_SVE2p3 and FEAT_SME2p3.
This change adds support for the svaba operations under FEAT_SVE2p3 and FEAT_SME2p3.
This change adds support for new svqshrn, svqshrun operations under FEAT_SVE2p3 and FEAT_SME2p3.
@rockdreamer
Copy link
Contributor Author

In the latest force push:

  • Neon case is now consistent
  • Typo fixes
  • svcvt_* is now svcvtzn_*
  • svaba_s*[_] is now just svabal[_s] and has gained a _n variant
  • updated vfdot_lane_f32_f16, vfdotq_laneq_f32_f16, vfdot_laneq_f32_f16, vfdotq_lane_f32_f16 to be similar to their bf16 counterparts.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

7 participants