From ae0b04f734dd656ead85f9bc535c27ec4691571e Mon Sep 17 00:00:00 2001 From: Daniel Baluta Date: Mon, 16 Feb 2026 11:43:18 +0200 Subject: [PATCH 1/6] platform: Add imx8mp cm7 platform This adds platform files necessary to run SOF on CM7 core of i.MX8MP. Signed-off-by: Daniel Baluta --- .../imx8m_cm7/include/platform/lib/clk.h | 26 ++++ .../imx8m_cm7/include/platform/lib/dma.h | 19 +++ .../imx8m_cm7/include/platform/lib/mailbox.h | 49 ++++++++ .../imx8m_cm7/include/platform/lib/memory.h | 42 +++++++ .../imx8m_cm7/include/platform/platform.h | 35 ++++++ .../imx8m_cm7/include/platform/trace/trace.h | 19 +++ src/platform/imx8m_cm7/lib/clk.c | 35 ++++++ .../imx8m_cm7/linker/data-sections.ld | 5 + src/platform/imx8m_cm7/platform.c | 112 ++++++++++++++++++ 9 files changed, 342 insertions(+) create mode 100644 src/platform/imx8m_cm7/include/platform/lib/clk.h create mode 100644 src/platform/imx8m_cm7/include/platform/lib/dma.h create mode 100644 src/platform/imx8m_cm7/include/platform/lib/mailbox.h create mode 100644 src/platform/imx8m_cm7/include/platform/lib/memory.h create mode 100644 src/platform/imx8m_cm7/include/platform/platform.h create mode 100644 src/platform/imx8m_cm7/include/platform/trace/trace.h create mode 100644 src/platform/imx8m_cm7/lib/clk.c create mode 100644 src/platform/imx8m_cm7/linker/data-sections.ld create mode 100644 src/platform/imx8m_cm7/platform.c diff --git a/src/platform/imx8m_cm7/include/platform/lib/clk.h b/src/platform/imx8m_cm7/include/platform/lib/clk.h new file mode 100644 index 000000000000..379aade87252 --- /dev/null +++ b/src/platform/imx8m_cm7/include/platform/lib/clk.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * + * Copyright 2026 NXP + */ + +#ifdef __SOF_LIB_CLK_H__ + +#ifndef __PLATFORM_LIB_CLK_H__ +#define __PLATFORM_LIB_CLK_H__ + +#define CLK_MAX_CPU_HZ 800000000 +#define CPU_DEFAULT_IDX 0 +#define NUM_CPU_FREQ 1 +#define NUM_CLOCKS 1 + +struct sof; + +void platform_clock_init(struct sof *sof); + +#endif /* __PLATFORM_LIB_CLK_H__ */ + +#else + +#error "This file shouldn't be included from outside of sof/lib/clk.h" + +#endif /* __SOF_LIB_CLK_H__ */ diff --git a/src/platform/imx8m_cm7/include/platform/lib/dma.h b/src/platform/imx8m_cm7/include/platform/lib/dma.h new file mode 100644 index 000000000000..ad55e7f7fb89 --- /dev/null +++ b/src/platform/imx8m_cm7/include/platform/lib/dma.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * + * Copyright 2026 NXP + */ + +#ifdef __SOF_LIB_DMA_H__ + +#ifndef __PLATFORM_LIB_DMA_H__ +#define __PLATFORM_LIB_DMA_H__ + +/* TODO: remove me whenever possible */ + +#endif /* __PLATFORM_LIB_DMA_H__ */ + +#else + +#error "This file shouldn't be included from outside of sof/lib/dma.h" + +#endif /* __SOF_LIB_DMA_H__ */ diff --git a/src/platform/imx8m_cm7/include/platform/lib/mailbox.h b/src/platform/imx8m_cm7/include/platform/lib/mailbox.h new file mode 100644 index 000000000000..6099d36806f9 --- /dev/null +++ b/src/platform/imx8m_cm7/include/platform/lib/mailbox.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * + * Copyright 2026 NXP + */ + +#ifdef __SOF_LIB_MAILBOX_H__ + +#ifndef __PLATFORM_LIB_MAILBOX_H__ +#define __PLATFORM_LIB_MAILBOX_H__ + +/* The i.MX8MP CM7 mailbox region is organized like this: + * + * +---------------+-------------------------+ + * | Region name | Base address | Size | + * +---------------+---------------+---------+ + * | Outbox region | 0x82000000 | 0x1000 | + * +---------------+---------------+---------+ + * | Inbox region | 0x82001000 | 0x1000 | + * +---------------+---------------+---------+ + * | Stream region | 0x82002000 | 0x1000 | + * +---------------+---------------+---------+ + * + * IMPORTANT: all regions should be 32-byte aligned. + * This is required because cache maintenance might + * be performed on them. + */ + +/* outbox */ +#define MAILBOX_DSPBOX_SIZE 0x1000 +#define MAILBOX_DSPBOX_BASE 0x82000000 +#define MAILBOX_DSPBOX_OFFSET 0 + +/* inbox */ +#define MAILBOX_HOSTBOX_SIZE 0x1000 +#define MAILBOX_HOSTBOX_BASE 0x82001000 +#define MAILBOX_HOSTBOX_OFFSET (MAILBOX_DSPBOX_OFFSET + MAILBOX_DSPBOX_SIZE) + +/* stream */ +#define MAILBOX_STREAM_SIZE 0x1000 +#define MAILBOX_STREAM_BASE 0x82002000 +#define MAILBOX_STREAM_OFFSET (MAILBOX_HOSTBOX_OFFSET + MAILBOX_HOSTBOX_SIZE) + +#endif /* __PLATFORM_LIB_MAILBOX_H__ */ + +#else + +#error "This file shouldn't be included from outside of sof/lib/mailbox.h" + +#endif /* __SOF_LIB_MAILBOX_H__ */ diff --git a/src/platform/imx8m_cm7/include/platform/lib/memory.h b/src/platform/imx8m_cm7/include/platform/lib/memory.h new file mode 100644 index 000000000000..413e77f142e1 --- /dev/null +++ b/src/platform/imx8m_cm7/include/platform/lib/memory.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * + * Copyright 2026 NXP + */ + +#ifdef __SOF_LIB_MEMORY_H__ + +#ifndef __PLATFORM_LIB_MEMORY_H__ +#define __PLATFORM_LIB_MEMORY_H__ + +#include + +#define PLATFORM_DCACHE_ALIGN DCACHE_LINE_SIZE + +#define SHARED_DATA + +#define uncache_to_cache(address) address +#define cache_to_uncache(address) address +#define cache_to_uncache_init(address) address +#define is_uncached(address) 0 + +/* no address translation required */ +#define host_to_local(addr) (addr) +#define local_to_host(addr) (addr) + +#define HEAPMEM_SIZE 0x00010000 + +/* WAKEUP domain MU1 side B */ +#define MU_BASE 0x30AB0000UL + +static inline void *platform_shared_get(void *ptr, int bytes) +{ + return ptr; +} + +#endif /* __PLATFORM_LIB_MEMORY_H__ */ + +#else + +#error "This file shouldn't be included from outside of sof/lib/memory.h" + +#endif /* __SOF_LIB_MEMORY_H__*/ diff --git a/src/platform/imx8m_cm7/include/platform/platform.h b/src/platform/imx8m_cm7/include/platform/platform.h new file mode 100644 index 000000000000..7d65624accda --- /dev/null +++ b/src/platform/imx8m_cm7/include/platform/platform.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * + * Copyright 2026 NXP + */ + +#ifdef __SOF_PLATFORM_H__ + +#ifndef __PLATFORM_PLATFORM_H__ +#define __PLATFORM_PLATFORM_H__ + +/* refers to M7 core clock - one core, one clock */ +#define PLATFORM_DEFAULT_CLOCK 0 + +#define HOST_PAGE_SIZE 4096 + +#define PLATFORM_PAGE_TABLE_SIZE 256 + +/* TODO: generous (SOF is usually used with 2 channels at most on i.MX + * platforms) and (potentially) not true. Can be adjusted later on if + * need be. + */ +#define PLATFORM_MAX_CHANNELS 4 +/* TODO: same as PLATFORM_MAX_CHANNELS */ +#define PLATFORM_MAX_STREAMS 5 + +/* WAKEUP domain MU7 side B */ +#define PLATFORM_IPC_INTERRUPT 97 + +#endif /* __PLATFORM_PLATFORM_H__ */ + +#else + +#error "This file shouldn't be included from outside of sof/platform.h" + +#endif /* __SOF_PLATFORM_H__ */ diff --git a/src/platform/imx8m_cm7/include/platform/trace/trace.h b/src/platform/imx8m_cm7/include/platform/trace/trace.h new file mode 100644 index 000000000000..3209ad9dc0ae --- /dev/null +++ b/src/platform/imx8m_cm7/include/platform/trace/trace.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * + * Copyright 2026 NXP + */ + +#ifdef __SOF_TRACE_TRACE_H__ + +#ifndef __PLATFORM_TRACE_TRACE_H__ +#define __PLATFORM_TRACE_TRACE_H__ + +/* TODO: remove me whenever possible */ + +#endif /* __PLATFORM_TRACE_TRACE_H__ */ + +#else + +#error "This file shouldn't be included from outside of sof/trace/trace.h" + +#endif /* __SOF_TRACE_TRACE_H__ */ diff --git a/src/platform/imx8m_cm7/lib/clk.c b/src/platform/imx8m_cm7/lib/clk.c new file mode 100644 index 000000000000..557ad07d0e6f --- /dev/null +++ b/src/platform/imx8m_cm7/lib/clk.c @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright 2026 NXP + */ + +#include +#include + +static const struct freq_table platform_cpu_freq[] = { + { + .freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, + .ticks_per_msec = CONFIG_SYS_CLOCK_TICKS_PER_SEC * 1000, + }, +}; + +static struct clock_info platform_clocks_info[NUM_CLOCKS]; + +void platform_clock_init(struct sof *sof) +{ + int i; + + sof->clocks = platform_clocks_info; + + for (i = 0; i < CONFIG_CORE_COUNT; i++) { + sof->clocks[i] = (struct clock_info) { + .freqs_num = NUM_CPU_FREQ, + .freqs = platform_cpu_freq, + .default_freq_idx = CPU_DEFAULT_IDX, + .current_freq_idx = CPU_DEFAULT_IDX, + .notification_id = NOTIFIER_ID_CPU_FREQ, + .notification_mask = NOTIFIER_TARGET_CORE_MASK(i), + .set_freq = NULL, + }; + } +} diff --git a/src/platform/imx8m_cm7/linker/data-sections.ld b/src/platform/imx8m_cm7/linker/data-sections.ld new file mode 100644 index 000000000000..3df5d5526577 --- /dev/null +++ b/src/platform/imx8m_cm7/linker/data-sections.ld @@ -0,0 +1,5 @@ +SECTION_PROLOGUE(.fw_metadata,,) +{ + KEEP (*(*.fw_metadata)) + . = ALIGN(16); +} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION) diff --git a/src/platform/imx8m_cm7/platform.c b/src/platform/imx8m_cm7/platform.c new file mode 100644 index 000000000000..1945e45e09f5 --- /dev/null +++ b/src/platform/imx8m_cm7/platform.c @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright 2026 NXP + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static const struct sof_ipc_fw_ready ready = { + .hdr = { + .cmd = SOF_IPC_FW_READY, + .size = sizeof(struct sof_ipc_fw_ready), + }, + .version = { + .hdr.size = sizeof(struct sof_ipc_fw_version), + .micro = SOF_MICRO, + .minor = SOF_MINOR, + .major = SOF_MAJOR, +#ifdef DEBUG_BUILD + .build = SOF_BUILD, + .date = __DATE__, + .time = __TIME__, +#endif + .tag = SOF_TAG, + .abi_version = SOF_ABI_VERSION, + .src_hash = SOF_SRC_HASH, + }, + .flags = DEBUG_SET_FW_READY_FLAGS, +}; + +const struct ext_man_windows windows + __aligned(EXT_MAN_ALIGN) __section(".fw_metadata") __unused = { + .hdr = { + .type = EXT_MAN_ELEM_WINDOW, + .elem_size = ALIGN_UP_COMPILE(sizeof(struct ext_man_windows), EXT_MAN_ALIGN), + }, + .window = { + .ext_hdr = { + .hdr.cmd = SOF_IPC_FW_READY, + .hdr.size = sizeof(struct sof_ipc_window), + .type = SOF_IPC_EXT_WINDOW, + }, + .num_windows = 3, + .window = { + { + .type = SOF_IPC_REGION_DOWNBOX, + .size = MAILBOX_HOSTBOX_SIZE, + .offset = MAILBOX_HOSTBOX_OFFSET, + }, + { + .type = SOF_IPC_REGION_UPBOX, + .size = MAILBOX_DSPBOX_SIZE, + .offset = MAILBOX_DSPBOX_OFFSET, + }, + { + .type = SOF_IPC_REGION_STREAM, + .size = MAILBOX_STREAM_SIZE, + .offset = MAILBOX_STREAM_OFFSET, + }, + }, + }, +}; + +int platform_boot_complete(uint32_t boot_message) +{ + mailbox_dspbox_write(0, &ready, sizeof(ready)); + + imx_mu_xcr_rmw(IMX_MU_VERSION, IMX_MU_GCR, + IMX_MU_xCR_GIRn(IMX_MU_VERSION, 1), 0); + + return 0; +} + +int platform_context_save(struct sof *sof) +{ + /* nothing to be done here */ + return 0; +} + +int platform_init(struct sof *sof) +{ + int ret; + + platform_clock_init(sof); + + scheduler_init_edf(); + + sof->platform_timer_domain = zephyr_domain_init(PLATFORM_DEFAULT_CLOCK); + zephyr_ll_scheduler_init(sof->platform_timer_domain); + + ret = dmac_init(sof); + if (ret < 0) + return ret; + + ipc_init(sof); + + dai_init(sof); + + return 0; +} From 3da6af3ba4380087d5a79e1c0052b2032ccc3790 Mon Sep 17 00:00:00 2001 From: Daniel Baluta Date: Mon, 16 Feb 2026 11:58:23 +0200 Subject: [PATCH 2/6] platform: Kconfig: Add config option to select i.MX8MP CM7 Add configuration option to support build for i.MX8MP CM7 core. Signed-off-by: Daniel Baluta --- src/platform/Kconfig | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/platform/Kconfig b/src/platform/Kconfig index a8e0addc3b98..e9a6fd1a5342 100644 --- a/src/platform/Kconfig +++ b/src/platform/Kconfig @@ -145,6 +145,15 @@ config IMX8M help Select if your target platform is imx8m-compatible +config IMX8M_CM7 + bool "Build for NXP i.MX8MP CM7 core" + select ZEPHYR_LOG + select BUILD_OUTPUT_BIN + select HOST_PTABLE + select IMX + help + Select if your target platform is imx8mp-compatible with cm7 core. + config IMX8ULP bool "Build for NXP i.MX8ULP" select XT_HAVE_RESET_VECTOR_ROM From e443c075693115751203b751c8d4befa3379980e Mon Sep 17 00:00:00 2001 From: Daniel Baluta Date: Mon, 16 Feb 2026 12:00:34 +0200 Subject: [PATCH 3/6] zephyr: Add build support for imx8mp cm7 This includes required sources in order to build imx8mp cm7 support. Signed-off-by: Daniel Baluta --- zephyr/CMakeLists.txt | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index 61ed49a3d15f..0ed24ca56cc4 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -353,6 +353,38 @@ if (CONFIG_SOC_MIMX8ML8_ADSP) set(PLATFORM "imx8m") endif() +if (CONFIG_SOC_MIMX8ML8_M7) + zephyr_library_sources( + ${SOF_PLATFORM_PATH}/imx8m_cm7/platform.c + ${SOF_PLATFORM_PATH}/imx8m_cm7/lib/clk.c + lib/dma.c + ) + + zephyr_library_sources( + ${SOF_DRIVERS_PATH}/imx/ipc.c + ) + + zephyr_library_sources( + ${SOF_SRC_PATH}/schedule/zephyr_ll.c + ) + + # SOF-specific linker script additions + zephyr_linker_sources(DATA_SECTIONS ${sof_top_dir}/src/platform/imx8m_cm7/linker/data-sections.ld) + + set(PLATFORM "imx8m_cm7") + + add_custom_target(zephyr.ri ALL + DEPENDS ${CMAKE_BINARY_DIR}/zephyr/zephyr.ri) + + add_custom_command(OUTPUT ${CMAKE_BINARY_DIR}/zephyr/zephyr.ri + COMMAND west sign --if-tool-available --tool rimage + --build-dir ${CMAKE_BINARY_DIR} ${WEST_SIGN_OPTS} + DEPENDS ${CMAKE_BINARY_DIR}/zephyr/${KERNEL_ELF_NAME}) + + board_set_rimage_target(imx8m_cm7) + +endif() + if (CONFIG_SOC_MIMX8UD7_ADSP) zephyr_library_sources( ${SOF_DRIVERS_PATH}/imx/ipc.c From ff32142f31879c6a5fe06b269bf4bfa8d3b5e4d6 Mon Sep 17 00:00:00 2001 From: Daniel Baluta Date: Mon, 16 Feb 2026 12:03:14 +0200 Subject: [PATCH 4/6] lib: dma: Add entries for SDMA3 and HOST_DMA Similar with support for imx8mp adsp, the cm7 instance uses sdma3 and HOST_DMA. Signed-off-by: Daniel Baluta --- zephyr/lib/dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/zephyr/lib/dma.c b/zephyr/lib/dma.c index 7452459f8b0a..6a4363ad8958 100644 --- a/zephyr/lib/dma.c +++ b/zephyr/lib/dma.c @@ -152,7 +152,7 @@ SHARED_DATA struct sof_dma dma[] = { .z_dev = DEVICE_DT_GET(DT_NODELABEL(host_dma)), }, #endif -#if defined(CONFIG_SOC_MIMX8ML8_ADSP) +#if defined(CONFIG_SOC_MIMX8ML8_ADSP) || defined(CONFIG_SOC_MIMX8ML8_M7) { .plat_data = { .dir = SOF_DMA_DIR_MEM_TO_DEV | SOF_DMA_DIR_DEV_TO_MEM, From 29670334b9863fab64d50decb34b718fb9fbafac Mon Sep 17 00:00:00 2001 From: Daniel Baluta Date: Mon, 16 Feb 2026 12:07:10 +0200 Subject: [PATCH 5/6] app: boards: Add dts and config overlay for imx8mp cm7 This enables host_dma, sdma3 and sai3 nodes and their respective drivers. Also, we enable CONFIG_ROMSTART_RELOCATION_ROM option in order to put romstart section into ITCM (because M7 gets its first instruction at adress 0 in ITCM). Note that we temporarily disable COMP_ASRC because there is a conflict between NXP HAL and SOF ASRC headers. e.g NXP HAL defines: #define ASRC ((ASRC_Type *)ASRC_BASE) and ASRC modules uses: #if SOF_USE_MIN_HIFI(5, ASRC) which results in a compilation error. Signed-off-by: Daniel Baluta --- app/boards/imx8mp_evk_mimx8ml8_m7_ddr.conf | 12 +++++++++ app/boards/imx8mp_evk_mimx8ml8_m7_ddr.overlay | 27 +++++++++++++++++++ 2 files changed, 39 insertions(+) create mode 100644 app/boards/imx8mp_evk_mimx8ml8_m7_ddr.conf create mode 100644 app/boards/imx8mp_evk_mimx8ml8_m7_ddr.overlay diff --git a/app/boards/imx8mp_evk_mimx8ml8_m7_ddr.conf b/app/boards/imx8mp_evk_mimx8ml8_m7_ddr.conf new file mode 100644 index 000000000000..856d3499a03d --- /dev/null +++ b/app/boards/imx8mp_evk_mimx8ml8_m7_ddr.conf @@ -0,0 +1,12 @@ +CONFIG_IMX8M_CM7=y +CONFIG_ZEPHYR_NATIVE_DRIVERS=y +CONFIG_SHARED_INTERRUPTS=y +CONFIG_CLOCK_CONTROL_FIXED_RATE_CLOCK=y +CONFIG_ROMSTART_RELOCATION_ROM=y +CONFIG_DMA_NXP_SOF_HOST_DMA_ALIGN=32 +CONFIG_DMA=y +CONFIG_DMA_NXP_SDMA=y +CONFIG_DAI_NXP_SAI=y +CONFIG_SAI_HAS_MCLK_CONFIG_OPTION=y +CONFIG_COMP_ASRC=n + diff --git a/app/boards/imx8mp_evk_mimx8ml8_m7_ddr.overlay b/app/boards/imx8mp_evk_mimx8ml8_m7_ddr.overlay new file mode 100644 index 000000000000..3f712e3ad00c --- /dev/null +++ b/app/boards/imx8mp_evk_mimx8ml8_m7_ddr.overlay @@ -0,0 +1,27 @@ +/* + * Copyright 2026 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + host_dma: dma { + compatible = "nxp,sof-host-dma"; + dma-channels = <32>; + #dma-cells = <0>; + }; +}; + +&sdma3 { + status = "okay"; +}; + +&sai3 { + pinctrl-0 = <&sai3_default>; + pinctrl-names = "default"; + rx-fifo-watermark = <64>; + tx-fifo-watermark = <64>; + fifo-depth = <96>; + rx-sync-mode = <1>; + status = "okay"; +}; From 9fa13efb5a8a634f26ced1a1d962bdd871524b75 Mon Sep 17 00:00:00 2001 From: Daniel Baluta Date: Mon, 16 Feb 2026 13:50:28 +0200 Subject: [PATCH 6/6] build: Add support for building SOF on imx8mp with cm7 This builds SOF binary firmware for M7 core on i.MX8MP. Resulted firmware name is: sof-imx8m_cm7.ri Signed-off-by: Daniel Baluta --- scripts/xtensa-build-zephyr.py | 6 +++++- tools/rimage/config/imx8m_cm7.toml | 15 +++++++++++++++ 2 files changed, 20 insertions(+), 1 deletion(-) create mode 100644 tools/rimage/config/imx8m_cm7.toml diff --git a/scripts/xtensa-build-zephyr.py b/scripts/xtensa-build-zephyr.py index 7610f81c1b81..e7626b8bc4d5 100755 --- a/scripts/xtensa-build-zephyr.py +++ b/scripts/xtensa-build-zephyr.py @@ -217,6 +217,10 @@ class PlatformConfig: "hifi4_mscale_v2_0_2_prod", RIMAGE_KEY = "key param ignored by imx8m" ), + "imx8m_cm7" : PlatformConfig( + "imx", "imx8mp_evk/mimx8ml8/m7/ddr", + "", "", "", "" + ), "imx8ulp" : PlatformConfig( "imx", "imx8ulp_evk/mimx8ud7/adsp", f"RI-2023.11{xtensa_tools_version_postfix}", @@ -1295,7 +1299,7 @@ def gzip_compress(fname, gzdst=None): # Don't run sof_ri_info and ignore silently .ri files that don't have one. RI_INFO_UNSUPPORTED = [] -RI_INFO_UNSUPPORTED += ['imx8', 'imx8x', 'imx8m', 'imx8ulp', 'imx95'] +RI_INFO_UNSUPPORTED += ['imx8', 'imx8x', 'imx8m', 'imx8m_cm7', 'imx8ulp', 'imx95'] RI_INFO_UNSUPPORTED += ['rn', 'acp_6_0'] RI_INFO_UNSUPPORTED += ['mt8186', 'mt8188', 'mt8195', 'mt8196', 'mt8365'] diff --git a/tools/rimage/config/imx8m_cm7.toml b/tools/rimage/config/imx8m_cm7.toml new file mode 100644 index 000000000000..2ba4fb5d16f6 --- /dev/null +++ b/tools/rimage/config/imx8m_cm7.toml @@ -0,0 +1,15 @@ +version = [1, 0] + +[adsp] +name = "imx8m_cm7" + +[[adsp.mem_zone]] +type = "IRAM" +base = "0x0000000" +size = "0x2000" +host_offset = "0x0" +[[adsp.mem_zone]] +type = "SRAM" +base = "0x80000000" +size = "0x100000" +host_offset = "0x0"