diff --git a/hdl/projects/cosmo_ignition/cosmo_ignition_top.vhd b/hdl/projects/cosmo_ignition/cosmo_ignition_top.vhd index 1e6ae50e..e56dba21 100644 --- a/hdl/projects/cosmo_ignition/cosmo_ignition_top.vhd +++ b/hdl/projects/cosmo_ignition/cosmo_ignition_top.vhd @@ -53,7 +53,7 @@ end entity; architecture rtl of cosmo_ignition_top is signal sw0_serial_in : std_logic; signal sw0_serial_out : std_logic; - signal sw1_serial_in : std_logic := '0'; + signal sw1_serial_in : std_logic; signal sw1_serial_out : std_logic; signal hotswap_restart_l : std_logic; signal led_counter : unsigned(24 downto 0) := (others => '0'); diff --git a/hdl/projects/observer_ignition/BUCK b/hdl/projects/observer_ignition/BUCK new file mode 100644 index 00000000..1c00b0be --- /dev/null +++ b/hdl/projects/observer_ignition/BUCK @@ -0,0 +1,22 @@ +load("//tools:hdl.bzl", "vhdl_unit") +load("//tools:yosys.bzl", "ice40_bitstream") + + +vhdl_unit( + name = "observer_ignition_top", + srcs = glob(["*.vhd"]), + deps = [ + "//hdl/ip/vhd/ignition/target:ignition_target_common", + "//hdl/ip/vhd/ignition/target:ignition_io", + ], + standard = "2008", +) + +ice40_bitstream( + name="observer_ignition", + top_entity_name="observer_ignition_top", + top= ":observer_ignition_top", + family="hx8k", + package="bg121", + pinmap="observer_ignition.pcf" +) \ No newline at end of file diff --git a/hdl/projects/observer_ignition/observer_ignition.pcf b/hdl/projects/observer_ignition/observer_ignition.pcf new file mode 100644 index 00000000..3fd26131 --- /dev/null +++ b/hdl/projects/observer_ignition/observer_ignition.pcf @@ -0,0 +1,46 @@ +set_io --warn-no-port ign_trgt_fpga_debug_led[0] A11 +set_io --warn-no-port ign_trgt_fpga_debug_led[1] A10 +set_io --warn-no-port ign_trgt_fpga_debug_led[2] C9 +set_io --warn-no-port ign_trgt_fpga_debug_led[3] B9 +set_io --warn-no-port ign_trgt_fpga_spare_v3p3[0] B8 +set_io --warn-no-port ign_trgt_fpga_spare_v3p3[1] A9 +set_io --warn-no-port ign_trgt_fpga_spare_v3p3[2] C8 +set_io --warn-no-port ign_trgt_fpga_spare_v3p3[3] D7 +set_io --warn-no-port ign_trgt_fpga_spare_v3p3[4] A8 +set_io --warn-no-port ign_trgt_fpga_spare_v3p3[5] C7 +set_io --warn-no-port ign_trgt_fpga_spare_v3p3[6] A7 +set_io --warn-no-port ign_trgt_fpga_spare_v3p3[7] B7 +set_io --warn-no-port clk_50mhz_ign_trgt_fpga B6 +set_io --warn-no-port ign_trgt_id[0] A5 +set_io --warn-no-port ign_trgt_id[1] B5 +set_io --warn-no-port ign_trgt_id[2] A4 +set_io --warn-no-port ign_trgt_id[3] B4 +set_io --warn-no-port ign_trgt_id[4] A3 +set_io --warn-no-port ign_trgt_id[5] B3 +set_io --warn-no-port ign_trgt_id[6] A2 +set_io --warn-no-port ign_trgt_id[7] A1 +set_io --warn-no-port ign_trgt_fpga_lvds_status_led_en_l L1 +set_io --warn-no-port a2_power_status_l L2 +set_io --warn-no-port ign_trgt_fpga_pushbutton_reset_l L5 +set_io --warn-no-port ign_trgt_fpga_design_reset_l K6 +set_io --warn-no-port lvds_rsw0_to_ign_trgt_fpga_p B2 +# inferred by fitter, not allowed to define +#set_io --warn-no-port lvds_rsw0_to_ign_trgt_fpga_n B1 +set_io --warn-no-port lvds_ign_trgt_fpga_to_rsw0_p C2 +set_io --warn-no-port lvds_ign_trgt_fpga_to_rsw0_n C1 +set_io --warn-no-port lvds_rsw1_to_ign_trgt_fpga_p G2 +# inferred by fitter, not allowed to define +#set_io --warn-no-port lvds_rsw1_to_ign_trgt_fpga_n G1 +set_io --warn-no-port lvds_ign_trgt_fpga_to_rsw1_p H1 +set_io --warn-no-port lvds_ign_trgt_fpga_to_rsw1_n H2 +set_io --warn-no-port v3p3_fpga2_a2_pg J11 +set_io --warn-no-port v1p2_fpga2_a2_pg K11 +set_io --warn-no-port v2p5_fpga2_a2_pg H10 +set_io --warn-no-port a2_en G10 +set_io --warn-no-port v3p3_sys_a2_pg D10 +set_io --warn-no-port v1p0_mgmt_a2_pg E11 +set_io --warn-no-port v2p5_mgmt_a2_pg D9 +set_io --warn-no-port sp_fault_l C11 +set_io --warn-no-port rot_fault_l B11 + +set_frequency clk_50mhz_ign_trgt_fpga 50 \ No newline at end of file diff --git a/hdl/projects/observer_ignition/observer_ignition_top.vhd b/hdl/projects/observer_ignition/observer_ignition_top.vhd new file mode 100644 index 00000000..91f669ee --- /dev/null +++ b/hdl/projects/observer_ignition/observer_ignition_top.vhd @@ -0,0 +1,130 @@ +-- This Source Code Form is subject to the terms of the Mozilla Public +-- License, v. 2.0. If a copy of the MPL was not distributed with this +-- file, You can obtain one at https://mozilla.org/MPL/2.0/. +-- +-- Copyright 2026 Oxide Computer Company + +-- Observer power shelf controller FPGA targeting an ice40 HX8k + + +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +use work.ignition_pkg.all; + + +entity observer_ignition_top is + port ( + clk_50mhz_ign_trgt_fpga : in std_logic; + ign_trgt_fpga_design_reset_l : in std_logic; + ign_trgt_fpga_debug_led : out std_logic_vector(3 downto 0); + ign_trgt_fpga_spare_v3p3 : out std_logic_vector(7 downto 0); + ign_trgt_id : in std_logic_vector(7 downto 0); + ign_trgt_fpga_lvds_status_led_en_l : out std_logic; + a2_power_status_l : out std_logic; + ign_trgt_fpga_pushbutton_reset_l : in std_logic; + lvds_rsw0_to_ign_trgt_fpga_p : inout std_logic; + lvds_ign_trgt_fpga_to_rsw0_p : inout std_logic; + lvds_ign_trgt_fpga_to_rsw0_n : inout std_logic; + lvds_rsw1_to_ign_trgt_fpga_p : inout std_logic; + lvds_ign_trgt_fpga_to_rsw1_p : inout std_logic; + lvds_ign_trgt_fpga_to_rsw1_n : inout std_logic; + a2_en : out std_logic; + v3p3_sys_a2_pg : in std_logic; + v1p0_mgmt_a2_pg : in std_logic; + v2p5_mgmt_a2_pg : in std_logic; + sp_fault_l : in std_logic; + rot_fault_l : in std_logic + + ); +end entity; + +architecture rtl of observer_ignition_top is + signal sw0_serial_in : std_logic; + signal sw0_serial_out : std_logic; + signal sw1_serial_in : std_logic; + signal sw1_serial_out : std_logic; + signal a2_pg : std_logic; + signal led_counter : unsigned(24 downto 0) := (others => '0'); + signal reset_sync1 : std_logic; + signal reset_syncd : std_logic; + +begin + rst_sync: process(clk_50mhz_ign_trgt_fpga, ign_trgt_fpga_design_reset_l) + begin + if ign_trgt_fpga_design_reset_l = '0' then + reset_sync1 <= '1'; + reset_syncd <= '1'; + elsif rising_edge(clk_50mhz_ign_trgt_fpga) then + -- flipping to active high here and providing a 2 clock sync + reset_sync1 <= '0'; + reset_syncd <= reset_sync1; + end if; + end process; + + -- Blink an LED at some rate + led: process(clk_50mhz_ign_trgt_fpga, reset_syncd) + begin + if reset_syncd = '1' then + led_counter <= (others => '0'); + elsif rising_edge(clk_50mhz_ign_trgt_fpga) then + led_counter <= led_counter + 1; + end if; + end process; + ign_trgt_fpga_lvds_status_led_en_l <= led_counter(23); + + + pg:process(clk_50mhz_ign_trgt_fpga, reset_syncd) + begin + if reset_syncd = '1' then + a2_pg <= '0'; + elsif rising_edge(clk_50mhz_ign_trgt_fpga) then + a2_pg <= v3p3_sys_a2_pg and v1p0_mgmt_a2_pg and v2p5_mgmt_a2_pg; + end if; + end process; + + a2_power_status_l <= not a2_pg; -- Active low power good LED + + ignition_target_common_inst: entity work.ignition_target_common + generic map( + NUM_LEDS => 4, + NUM_BITS_IGNITION_ID => 8 + ) + port map( + clk => clk_50mhz_ign_trgt_fpga, + reset => reset_syncd, + sw0_serial_in => sw0_serial_in, + sw0_serial_out => sw0_serial_out, + sw1_serial_in => sw1_serial_in, + sw1_serial_out => sw1_serial_out, + ignit_to_ibc_pwren => a2_en, + hotswap_restart_l => open, + ignit_led_l => ign_trgt_fpga_debug_led, + a3_pwr_fault_l => '1', + a2_pg => a2_pg, + sp_fault_l => sp_fault_l, + rot_fault_l => rot_fault_l, + push_btn_l => '1', + ignition_id => ign_trgt_id, + dbg => ign_trgt_fpga_spare_v3p3(4 downto 2) + ); + + ignition_io_inst: entity work.ignition_io + port map( + clk => clk_50mhz_ign_trgt_fpga, + sw0_serial_in => sw0_serial_in, + sw0_serial_out => sw0_serial_out, + sw1_serial_in => sw1_serial_in, + sw1_serial_out => sw1_serial_out, + rsw0_serial_in_p => lvds_rsw0_to_ign_trgt_fpga_p, + rsw0_serial_out_p => lvds_ign_trgt_fpga_to_rsw0_p, + rsw0_serial_out_n => lvds_ign_trgt_fpga_to_rsw0_n, + rsw1_serial_in_p => lvds_rsw1_to_ign_trgt_fpga_p, + rsw1_serial_out_p => lvds_ign_trgt_fpga_to_rsw1_p, + rsw1_serial_out_n => lvds_ign_trgt_fpga_to_rsw1_n + ); + + ign_trgt_fpga_spare_v3p3(0) <= not sw0_serial_in; + ign_trgt_fpga_spare_v3p3(1) <= sw0_serial_out; +end rtl; \ No newline at end of file diff --git a/tools/fpga_releaser/config.toml b/tools/fpga_releaser/config.toml index baaa1d58..54f541b5 100644 --- a/tools/fpga_releaser/config.toml +++ b/tools/fpga_releaser/config.toml @@ -25,4 +25,9 @@ toolchain = "vivado" job_name = "gfruit-image" hubris_path = "drv/spartan7-loader/grapefruit" builder = "buck2" -toolchain = "vivado" \ No newline at end of file +toolchain = "vivado" + +[observer-ignition] +job_name = "observer-ignition-image" +builder = "buck2" +toolchain = "yosys" \ No newline at end of file