cortexm : mistmatch between gdb regnum and internal logic

[mean00]

Hi,
There seems to be several issues when matching the gdb representation of the registers and the internal representation.
1- xPSR is forced to be 25, leaving a gap in the gdb register numbering (16->25). That breaks the conversion between regnum and actual register index >= xPSR (that's relevant when reading/writing a single register). msp and psp cannot be set individually for example.

2- Similarily, the matching is problematic due to optional registers such as basepri.
Trustzone is simply offset by CORTEXM_GENERAL_REGCOUNT (20), while the value is actually ~22 for cortex m33.

The first one is easy to fix, but it looks difficult to do a simple/quick fix for the 2nd one that works for cortex M0 and M33 without rewriting a significant part of the logic.

An option would be to have more gaps in the registers, so that a given register is always at the same place/index whatever the chip is, rather than strictly following the registers that are present on the current chip.

[mean00]

actually they seems to be always presented in the xml description
so just adding them to the internal tables and bumping CORTEXM_GENERAL_REGCOUNT to ~ 23 may do the trick

[mean00]

There is a probably a need for a small translation layer between gdb view and internal view
As far as i can see, the read_reg functions are used directly for internal use and from gdb
Most of the access are for the low number registers so it does not hurt much, if at all